an 008 may 2 000 1 a basi s for ldo and it?s thermal design introduction the aic ldo family device , a 3 - terminal regulator , can be easily use d with all protection features that are expected in high performance voltage regulation application. th e s e de vice s provide short - circuit protection, thermal shutdown protection and internal current limit protection against any overload condition that would create over heating junction temperature . (1)current limit protection like other power regulat i o n ic, t he aic ldo family ha s safety protection area . the current limit protection work s while outputting heavy - loading current and keeps the output current within a safe operating scope. t he output voltage decreases to a lower volt age level at the same time . the aic ldo family protection function is designed to set up output current limit when over - current happen and the downstream devices can be protected from being damaged. figure 1 aic1086 c u rrent l imit t est upper: output voltage (1v/div) l ower: output current (2a/div) (2) protection diodes during normal operation , the aic ldo device need s no protection diode . the internal diode between input and output pins can handle mic rosecond surge current. even with large output capacitance , it is very difficult to get those values of surge current in normal operation. the damage will not occur, unless the high value output capacitors and the input pin are shorted to ground instantane ously. a crowbar circuit at the input of the ldo device can generate those kinds of current and a diode from output - to - input is then recommended. normal power supply cycling or even plugging and unplugging in the system will not generate sufficient large c urrent to damage device (see figure 2) . c out v out v in function block diagram + d1 + c in aic1086 topology figure 2 aic1086 protection diodes diagram (3) ripple rejection it is recommended to use the aic ldo family
an 008 2 device i n the application required impr oving ripple rejection. by connect ing a bypass capacitor from the adj pin to the ground can reduce the output voltage ripple significantly (see figure3). the bypass capacitor prevents output ripple from being amplified as the output voltage or loading current increase s . the function is defined by: r1 c fr 2 p 1 adj * * here the fr is the output ripple frequency and the c adj is a bypass capacitor (for figure 4) . t he ripple rejection capability intensifies as output capacitor increases, the output ri pple will then be reduced. for more information, please refer to ai c ldo family datasheet. c out v out v in + function block diagram d1 c adj c in + r2 r1 aic1086 topology figure 3 aic1086 and bypass capacitor (c adj ) 0.1 1 10 100 15 20 25 30 35 40 45 50 55 60 b : c out =10 m f, i l =1ma c : c out =1 m f, i l =1ma d : c out =1 m f, i l =40ma v in =5v dc + 1vp-p ripple rejection (db) (aic1722d - 33) frequency ( khz) figure 4 aic 1722d - 33 frequency a nd ripple rejection (4) load regulation being a three - terminal device, the aic ldo family is unable to provide true remote load sensing. the resistance of the wire connecting the regulator to the load will limit the load regulation. ple ase refer to the datasheet for the detail measurement. (a) figure 5: when the fixed type regulator is used, the load should be connected to the output terminal on the positive side and the ground terminal on the negative side. the output voltage is measure d as the follow ing equation : ) rs2 (rs1 i v v o out l + - = (b) figure 6: when the adjustable type regulator is used, the load should be connected to the output terminal on the positive side and the ground terminal on the negative side. the output voltage is meas ured as the follow ing equation : ) rs2 (rs1 i r1 r2 r1 v v o ref l + - + = (c) load regulation is the circuit ? s ability to maintain the specified output voltage level under different load conditions, which is defined as: o out i v d d figure 7 shows a pmos volt age regulator. the ratio of output voltage variation to the given load current vari ation ( d v out / d i o ) under constant input voltage vi can be c alculated as follow . here, q1 is the series pass element, and b is the current gain of q1. gm is th e transconductance of the error amplifier at its operating point. assume that there is a small output current change ( d i o ) , the change of output current causes the output voltage to change was ca l culated as: ) r r r2) (r1 (r r i v l l eq eq o out ? + = d = d
an 008 3 where r eq is the equ ivalent output resistor .the change of sensed voltage multiplied by gm of the error amplifier input difference and b of the pmos current gain (figure7) must be large enough to achieve the specified change of output current. thus, out m m o v ) r2 r1 r2 ( g v g i d + b = + d b = d t hen, the load regulator is obtained from above equation. r2 r2 r1 gm 1 i v o out + b = d d since load regulation is a steady - state parameter, all frequency components are neglected. the load regulation is limited by the open loop current gain of the system. as noted from the above equation, increasing dc open loop current gain improved load regulation. v in v out rl rs1 vin vout gnd rs2 gnd figure 5 aic ldo fixed regulator v in v out rl rs1 rs2 gnd vin vout gnd r2 r1 figure 6 aic ldo adjustable regulator v reference gnd v out v in error amp. - + q1 ( b ) i o ? rl r1 g m r2 figure 7 pmos voltage regulator (5) quiescent current or ground current quiescent current or ground current is the difference between input and output current for aic ldo family. minimum quiescent current is necessary to maxim ize current efficiency. it is defined: o i q i i i - = quiescent current consists of bias current and drive current of the series pass element, which do es not contribute to output power. the series pass element, function diagram, ambient temperatu re, and etc, determine the value of quiescent current . linear dropout voltage usually employ bipolar or mos transistors as series pass element s . (a) figure 8 :the collector current of bipolar transistors is defined by: b c i i b = where i c is the collector current of bipolar transistor , b is the common - emitter current gain of bipolar transistor and i b is the base current of bipolar transistor . the base current of bipolar transistor is proportional to the collector current. when the output current i ncreases, the base current increases, too. since the base current contributes to quiescent current, bipolar transistors have higher quiescent current than mos transistors. at the same time, during the dropout region the quiescent current will increase, because of the additional parasitic current path between the emitter and the base of bipolar transistors, which is caused by a lower base voltage than that of the output voltage.
an 008 4 (b) figure 9 the drain source current of mos transistors is defined by: 2 t ds d ds ds 2 t gs d ) v k(v i 0) v )( v (1 ) v k(v i - = t ? l l + - = k is a mos transistor conductivity parameter vgs is the gate to source voltage vt is the mos threshold voltage the drain current is a function of the gate to source voltage, not the gate current. i b1 b ic v cc i b2 i b3 figure 8 i - v c haracteristics of b ipolar t ransistors v gs2 k id v ds v gs3 v gs4 v gs1 figure 9 i - v c haracteristic of mos t ransistors for bipolar transistors, the quiescent current increases proportionally with the output current because the series pass element is a current - driven device. for mos transistors, the quiescent current has a near constant value with respect to the load current since the device is voltage - driven. the only thing s that contribute to th e quiescent current for mos transistors are the biasing currents of band - gap, sampling resistor, and error amplifier. in most applications where power consumption is critical or where small bias current is request ed in comparison with the output curren t, an ldo voltage regulator using mos transistors is an essential choice . figure 10 and figure 11 show the ground current with respect to input voltage and temperature. ground current ( m a) input voltage (v) 10 20 30 40 50 60 0 2 4 6 8 10 12 0 ground current vs. input voltage figure 10 aic1722 input and ground cu rrent c haracteristics ground current vs. temperature ground current ( m a) temperature ( c) 125 0 25 50 75 100 -25 -50 50 52 54 56 58 60 i l =300ma i l =150ma i l =0.1ma figure 11 aic 1722 temperature and ground c urrent c haracteristics (6) thermal considerations the aic ldo family ha s internal power and thermal - limiting circuitry, which is designed to protect the device against overload conditions. for continuous normal load conditions , however, maximum ratings of junction temperature must not be exceeded. it is important to pay more attention to all sources of thermal resistance from junction to ambient . this includes junction - to - case, case - to - heat sink interface, and heat sink resistance itself.
an 008 5 we take the following condition as an example of aic 1086. v in (max continuous)=5v, v out =3.3v, i out =1a , t a =70oc q heat sink =1oc/w, q case - to - heatsink =0.2oc/w for to - 220 package with thermal compound. power dissipation under these conditions can be calculated: p d =(v in - v out )(i out )=1.7w junction temperature will be equal to: t j =t a +p d ( q heat s ink + q case - to - heat sink + q jc ) for the operating junction t emperature range: t j =70oc+1.7w(1oc/w+0.2oc/w+0.7oc/w) =73.23oc 73.23oc<125oc=t jmax ( operating junction temperature range) for the storage temperature range: t j =70oc +1.7w (1oc / w+0.2oc / +3oc /w) =77.14oc 77.14oc<150oc=t jmax (storage temperature range) in the above two cases , the junction temperature are lower than the maximum rating , and this ensure a reliable operation. (7) efficiency the quiescent or ground current and input/outp ut voltage are with respect to the efficiency of a ldo regulator input/output voltage with follow ing equation : ( ) % 100 v i i v i e i g o o o + = in order to achieve a high er efficiency for ldo regulator, the dropout voltage and quiescent current must be redu ced. in addition, the dropout voltage between input and output must be minimized since the power dissipation of ldo regulators affects to the efficiency significantly . power dissipation = (vi ? vo) io for example of aic1722: input voltage is 5v output vol tage is 3.3v output current is 300ma ground (max) current is 80 m a ( ) 66% 100% 5 88 8 300ma 3.3 300ma e = + = (8) layout note according to the following parameter, we can achieve the maximum allowable t emperature r ise, ( t r ) t r = t j (max) - t a (max) where t j (max) is the maximu m allowable junction temperature (125oc ), and t a (max) is the maximum ambient temperature suitable in the application. use the calculated values for t r and p d , the maximum allowable value of the junction - to - ambient thermal resistance ( q ja ) can be calc ulated: q ja =t r /p d i f the maximum allowable value for q ja is achieved to be 3 133oc /w for sot - 223 package or 3 74oc /w for to - 220 package or 3 102oc /w for to - 263 package, no heatsink is needed since the package will dissipate heat to satisfy these requirements. if the calculated value for q ja falls below these limits, extra heatsink for ldo device is required. table 1. q ja different heatsink area table 1 shows the value s of the q ja of sot - 223 and to - 263 for different heatsink area. the
an 008 6 co pper patterns that we used to measure these q ja are shown as below. copper area thermal resistance layout top side (in 2 )* bottom side (in 2 )* ( q ja c/w) to - 263 ( q ja c/w) sot - 223 1 0.012 0 102 133 2 0.064 0 83 122 3 0.3 0 61 82 4 0.52 0 53 73 5 0 .75 0 51 67 6 1 0 46 63 7 0 0.2 83 117 8 0 0.4 69 94 9 0 0.6 62 87 10 0 0.8 54 81 11 0 1 55 78 12 0.065 0.065 88 123 13 0.174 0.174 71 92 14 0.283 0.283 60 82 15 0.391 0.391 55 75 16 0.4 0.4 53 70 table 2. aic ldo series temperature table ( - ) since ic ? s temperature can rise up, these operation conditions are not recomm e nded . test ic type ?g aic1722 - 33czl(to - 92) without heat sink power dissipation 0.5w 0.7w( - ) load current 298ma 417ma output voltage 3.302v 3.307v long time test: ta : 28oc test time: 20 min. no load: input voltage : 5v dc output voltage :3.322v dc package 70oc 81oc test ic type ?g aic1722 - 33czl(sot - 89) ic stick on pcb power dissipation 0.5w 0.6w( - ) load current 290ma 348ma output voltage 3.305v 3.299v long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.278v dc package 70oc 80oc
an 008 7 te st ic type ?g aic1723 - 33ce(to - 252) ic stick on pcb power dissipation 0.5w 0.9w 1w( - ) load current 300ma 538ma 598ma output voltage 3.321v 3.313v 3.316v long time test ta : 28oc test time : 20 min. no load : input voltage : 5v dc output voltage :3.328v dc packa ge 40oc 50oc 57oc test ic type ?g aic1723 - 33cf(to - 251) without heat sink power d issipation 0.9w 1w 1.1w( - ) load c urrent 524ma 582ma 641ma output v oltage 3. 294v 3.295v 3.296v package 63oc 66oc 73oc long time test ta : 28oc test time : 20min. no load: input voltage : 5v dc output voltage :3.284v dc junction 80oc 87oc 96oc test ic type ?g aic1084ct(to - 220) without heat sink power d issipation 1w 3w( - ) 6w( - ) lo ad c urrent 600ma 1.802a 3.604a output v oltage 3.331v 3.311v 3.291v package 55oc 99oc 127oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.335v dc junction 66oc 124oc 176oc test ic type ?g aic1 084ct (to - 220) with heat sink power d issipation 1w 3w 6w( - ) load c urrent 600ma 1.802a 3.604a output v oltage 3.333v 3.322v 3.219v package 47oc 61oc 88oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.335v dc junction 54oc 85oc 113oc test ic type ?g aic1 084ct (to - 220) ic stick on pcb power d issipation 1w 3w 6w( - ) load c urrent 600ma 1.802a 3.604a output v oltage 3.333v 3.324v 3.197v package 41oc 66oc 93oc long time test ta : 28oc test time : 20min. no load: input voltage : 5v dc output voltage :3.335v dc junction 46oc 75oc 110oc
an 008 8 test ic type ?g aic1 084cm (to - 263) ic stick on pcb power d issipation 1w 3w 6w( - ) 7w( - ) load c urrent 594ma 1.784a 3.567a 4.162a output v oltage 3.314v 3.296v 3.242v 3.077v package 40oc 74oc 88oc 100oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.318v dc junction 44oc 90oc 108oc 120oc test ic type ?g aic1085ct(to - 220) without heat sink power d issipation 1w 3w( - ) 6w( - ) load c urrent 556ma 1.667a 3.333a output v oltage 3.193v 3.173v 3.285v package 56oc 90oc 130oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.200v dc junction 76oc 146oc 193oc test ic type ?g aic1085ct(to - 220) with heat sink power d issipation 1w 3w 6w( - ) load c urrent 556ma 1.667a 3.333a output v oltage 3.192v 3.179v 3.176v package 40oc 56oc 95oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.200v dc junction 50oc 80oc 138oc test ic type ?g aic1085ct(to - 220) ic stick on pcb power d issipation 1w 3w 6w( - ) load c urrent 556ma 1.667a 3.333a output v oltage 3.199v 3.192v 3.174v package 45oc 65oc 100oc long time test ta : 28 test time : 20 min. no load: input voltage : 5v dc output voltage :3.200v dc junction 54oc 85oc 132oc test ic type ?g aic1085cm(to - 263) ic stick on pcb power d issipation 1w 3w 6w( - ) load c urrent 595ma 1.788a 3.576a output v oltage 3.321v 3.310v 3.192v package 40oc 64oc 80oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output vol tage :3.322v dc junction 47oc 88oc 100oc
an 008 9 test ic type ?g aic1117ce(to - 252) ic stick on pcb power d issipation 1w 1.5w 2w( - ) load c urrent 561ma 841ma 1.122a output v oltage 3.204v 3.192v 3.184v package 55oc 68oc 80oc long time test ta : 28oc test time : 20 min. no load: input voltage : 5v dc output voltage :3.217v dc junction 60oc 70oc 84oc (9) summary install a 10 m f (or grea ter) capacitor is required between the aic ldo family device?s output and ground pins for the reason of stability. without this capacitor, the part will oscillate. even though most types of capacitor may work, the equivalent series resistance (esr) should be held to 5 w or less, if aluminum electrolytic type is used. many aluminum electrolytic capacitors have electrolytes that will freeze under - 30 c , so solid tantalums are recommended for operation below - 25 c . the value of this capacitor may be increased without limit. a 10 m f (or greater) capacitor should be placed from the aic ldo family input to ground if the lead inductance between the input and power source exceeds 500nh (approximately 10 inches of trace).
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